Evaluation Kit Hardware
4.3.8.3
Touch Screen Interface
The LCD module integrates a 4-wire touch panel controlled by MN7 (ADS7843) which is a slave device
on the SAM3S SPI bus. The controller sends back the information about the X and Y positions, as well
as a measurement for the pressure applied to the touch panel. The touch panel can be used with either
a stylus or a finger.
The ADS7843 touch panel controller connects to the SPI0 interface via the NPCS0 control signal. Two
interrupt signals are connected and provide events information back to the microcontroller: PenIrq and
Busy.
Note:
PenIrq (PA16) is shared with ZigBEE signal IRQ0.
Busy (PA17) is shared with ZigBEE signal IRQ1.
Therefore, if using a ZigBEE interface in concurrence with the TouchScreen controller, take
care not to have both drivers enabled at the same time on either PA16 or PA17.
For that purpose, 0 Ohm resistors have been implemented on these PIO lines in order to disconnect
either end driver from the other:
On the touch panel controller side, R67 and R69.
On ZigBEE side, R117 and R120.
for further information, refer to the “Schematics” section.
Touch ADC auxiliary inputs IN3/IN4 of the ADS7843 are connected to test point (TP8, TP9) for optional
function extension.
Figure 4-10. Touch Panel Control
+ 3 V 3
MN7
AD S 7 8 4 3 E
R62
100K
+ 3 V 3
X_RIGHT
Y_UP
X_LEFT
Y_DOW N
2
3
4
5
XP
YP
XM
YM
DCLK
DIN
DOUT
C S
16
14
12
15
PA14
PA1 3
PA12
R66
0R
PA11
R65
100K
TP 8
S MD
TP9
S MD
BU S Y
PENIRQ
1 3
11
R67
0R
PA17
R69
0R
PA16
+ 3 V 3
4.7 u F
R72
100K
R7 3
100K
7
8
IN 3
IN4
VREF
VCC1
VCC2
GND
9
1
10
6
R70
C5 8
100nF
0R
C59
100nF
C60
100nF
R71
1R
C61
L2
10 u H/100mA
R74
0R
4.3.9
JTAG/ICE
AGND_TP
AGND_TP
DGND
A standard 20-pin JTAG/ICE connector is implemented on the SAM3S-EK for the connection of a com-
patible ARM JTAG emulator interface, such as the SAM-ICE from Segger.
Notes: 1. The NRST signal is connected to BP1 system button and is also used to reset the LCD
module. The 0 ohm resistor R44 may be removed in order to isolate the JTAG port from
this system reset signal.
2. The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M3 is
not in debug mode. To avoid current consumption on VDDIO and/or VDDCORE due to
floating input, the internal pull-up resistor corresponding to this PIO line must be
enabled.
4-8
11031C–ATARM–30-Mar-11
SAM3S-EK Development Board User Guide
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